2.3.3 PHY interface

The PHY interface provides command scheduling and arbitration, including the generation of any required SDRAM prepare commands, for example, ACTIVATE and PRECHARGE. This section describes the PHY interface in the DMC-520.

The PHY interface is a DFI3.0 interface compatible with the DDR standards for DDR4 and DDR3 (including DDR3L). It provides:
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