2.3.6 Abort interface

The abort interface is a 4-phase request and acknowledge handshake that the DMC can use to recover from a livelock caused by a DRAM failure or a PHY failure. When a failure happens, it causes repeated retries of commands on the memory interface.

The following diagram shows the request, acknowledge handshake.
Figure 2-3 Abort interface timing diagram
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The system can issue an abort at any time that puts the DMC into the ABORT architectural state. Software must then restore the memory state. All current system transactions are retried when instructed by software.
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