Non-ConfidentialPDF file icon PDF versionARM 100000_0001_00_en
ARM® CoreLink™ DMC-520 Dynamic Memory Controller Technical Reference ManualRevision r0p1
Home > Programmers Model > Register descriptions > queue_allocate_control_031_000

3.3.69 queue_allocate_control_031_000

Used to inform the DMC that a particular queue (RAM) entry has failed, where 0 means failed and not included for allocation.

The queue_allocate_control_031_000 register characteristics are:
Usage constraints
Can be read from when in ALL states. Can be written to when in ALL states.
Configurations
There is only one DMC configuration.
Attributes
Offset
0x148
Type
Read-write
Reset
0xFFFFFFFF
Width
32
The following figure shows the bit assignments.
Figure 3-69 queue_allocate_control_031_000 register bit assignments
To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.

The following shows the bit assignments.
[31:0] queue_allocate_control_031_000
Used to inform the DMC that a particular queue (RAM) entry has failed, where 0 means failed and not included for allocation.
Non-ConfidentialPDF file icon PDF versionARM 100000_0001_00_en
Copyright © 2014 ARM. All rights reserved. 
Home > Programmers Model > Register descriptions > queue_allocate_control_031_000