Configures the DMC to not allocate particular queue entries (one bit per entry), for example to avoid using faulty internal RAM locations.
The queue_allocate_control_127_096 register characteristics are:
- Usage constraints
Can be read from when in ALL states. Can be written to when in ALL states.
There is only one DMC configuration.
The following figure shows the bit assignments.
Figure 3-72 queue_allocate_control_127_096 register bit assignments
The following shows the bit assignments.
- [31:0] queue_allocate_control_127_096