3.3.88 scrub_control3_next

Scrub engine channel control register.

The scrub_control3_next register characteristics are:
Usage constraints
Can be read from when in ALL states. Can be written to when in ALL states.
There is only one DMC configuration.
The following figure shows the bit assignments.
Figure 3-88 scrub_control3_next register bit assignments
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The following shows the bit assignments.
[31:29] Reserved_6
Unused bits
[28:24] outstanding_request_limit_scrub3_next
Configures the maximum number of oustanding scrub requests for scrub program 3 The supported range for this bitfield is 8-31.
[23:20] Reserved_5
Unused bits
[19:16] escalation_count_scrub3_next
Configures number of escalation prescalar periods before incrementing priority for scrub operations (0 disables this feature)
[15:14] Reserved_4
Unused bits
[13] stop_on_page3_next
Configures stop_on_page of scrub operations, scrub program will pause when reach page address if set
[12:9] qos_for_scrub3_next
Configures QoS value of scrub operations
[8:7] Reserved_3
Unused bits
[6] completion_interrupt3_next
Configures whether to emit an event when the sequence completes
[5:4] Reserved_2
Unused bits
[3] scrub_addr_mode3_next
Configures scrub address mode
[2] Reserved_1
Unused bits
[1:0] trigger3_next
Controls the trigger event associated with the channel operation.
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