Configures the address space control for the scrub engine channel.
The scrub_address_min5_next register characteristics are:
- Usage constraints
Can be read from when in ALL states. Can be written to when in ALL states.
There is only one DMC configuration.
The following figure shows the bit assignments.
Figure 3-95 scrub_address_min5_next register bit assignments
The following shows the bit assignments.
- [31:0] scrub_address_min5_next
Program to set the starting address for the scrub engine. When scrub_addr_mode5 is set to physical_address this register specifies logical rank [24:22], physical bank [21:18] and physical row address [17:0] directly. When scrub_addr_mode5 is set to system_address this register specifies the address in the same address format used by incoming system transactions.