3.3.104 mux_control_next

Control muxing options for the DMC.

The mux_control_next register characteristics are:
Usage constraints
Can be read from when in ALL states. Can be written to when in ALL states.
Configurations
There is only one DMC configuration.
Attributes
Offset
0x1F4
Type
Read-write
Reset
0x00000000
Width
32
The following figure shows the bit assignments.
Figure 3-104 mux_control_next register bit assignments
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The following shows the bit assignments.
[31:11] Reserved_1
Unused bits
[10:8] cid_mask_next
Program to mask inclusion of dfi_cid[2:0] output in parity calculation, where for each bit of cid_mask[2:0] a value of 1 means include the corresponding bit of dfi_cid[2:0].
[7:6] rst_mux_control_next
Program to control muxing of dfi_reset_n output for DIMM applications.
[5:4] ck_mux_control_next
Program to control muxing of dfi_ck output for DIMM applications.
[3:2] cke_mux_control_next
Program to control muxing of dfi_cke output for DIMM applications.
[1:0] cs_mux_control_next
Program to control muxing of dfi_cs_n output for DIMM applications.
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