Configures the refresh interval timing parameter. It must be programmed to the device average all-bank AUTOREFRESH interval, divided by 8.
The t_refi_next register characteristics are:
- Usage constraints
Can be read from when in ALL states. Can be written to when in ALL states.
There is only one DMC configuration.
The following figure shows the bit assignments.
Figure 3-107 t_refi_next register bit assignments
The following shows the bit assignments.
- [31:21] Reserved_3
- [20:16] Reserved_2
- [15:11] Reserved_1
- [10:0] t_refi_next
The supported range for this bitfield is 63-2047.