3.3.133 t_zqcs_next

Configures the delay to apply following a ZQC-Short calibration command.

The t_zqcs_next register characteristics are:
Usage constraints
Can be read from when in ALL states. Can be written to when in ALL states.
Configurations
There is only one DMC configuration.
Attributes
Offset
0x278
Type
Read-write
Reset
0x00000040
Width
32
The following figure shows the bit assignments.
Figure 3-133 t_zqcs_next register bit assignments
To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.

The following shows the bit assignments.
[31:10] Reserved_1
Unused bits
[9:0] t_zqcs_next
t_zqcs_next bitfield. The supported range for this bitfield is 2-1023.
Non-ConfidentialPDF file icon PDF versionARM 100000_0001_00_en
Copyright © 2014 ARM. All rights reserved.