Shows the current status of geardown, MPD and CAL.
The rank_status register characteristics are:
- Usage constraints
Can be read from when in ALL states. Cannot be changed.
There is only one DMC configuration.
The following figure shows the bit assignments.
Figure 3-161 rank_status register bit assignments
The following shows the bit assignments.
- [31:24] Reserved_1
- [23:16] m0_rank_cal_mode
One-bit per rank indicating if the rank is in CAL mode
- [15:8] m0_rank_mpd_mode
One-bit per rank indicating if the rank is in MPD mode
- [7:0] m0_rank_geardown_mode
One-bit per rank indicating if the rank is in geardown mode