3.3.161 rank_status

Shows the current status of geardown, MPD and CAL.

The rank_status register characteristics are:
Usage constraints
Can be read from when in ALL states. Cannot be changed.
Configurations
There is only one DMC configuration.
Attributes
Offset
0x398
Type
Read-only
Reset
0x00000000
Width
32
The following figure shows the bit assignments.
Figure 3-161 rank_status register bit assignments
To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.

The following shows the bit assignments.
[31:24] Reserved_1
Unused bits
[23:16] m0_rank_cal_mode
One-bit per rank indicating if the rank is in CAL mode
[15:8] m0_rank_mpd_mode
One-bit per rank indicating if the rank is in MPD mode
[7:0] m0_rank_geardown_mode
One-bit per rank indicating if the rank is in geardown mode
Non-ConfidentialPDF file icon PDF versionARM 100000_0001_00_en
Copyright © 2014 ARM. All rights reserved.