3.3.162 mode_change_status

Shows the current status of the sequence that is currently being processed.

The mode_change_status register characteristics are:
Usage constraints
Can be read from when in ALL states. Cannot be changed.
Configurations
There is only one DMC configuration.
Attributes
Offset
0x39C
Type
Read-only
Reset
0x00000000
Width
32
The following figure shows the bit assignments.
Figure 3-162 mode_change_status register bit assignments
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The following shows the bit assignments.
[31:18] Reserved_3
Unused bits
[17:16] m0_mode_change_seq
The sequence position the mode change is performing.
[15:12] Reserved_2
Unused bits
[11:4] m0_mode_change_ranks
One-bit per rank indicating the ranks being targetted by the command.
[3] Reserved_1
Unused bits
[2:0] m0_mode_change_cmd
The command being performed.
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