Shows the current status of the sequence that is currently being processed.
The mode_change_status register characteristics are:
- Usage constraints
Can be read from when in ALL states. Cannot be changed.
There is only one DMC configuration.
The following figure shows the bit assignments.
Figure 3-162 mode_change_status register bit assignments
The following shows the bit assignments.
- [31:18] Reserved_3
- [17:16] m0_mode_change_seq
The sequence position the mode change is performing.
- [15:12] Reserved_2
- [11:4] m0_mode_change_ranks
One-bit per rank indicating the ranks being targetted by the command.
-  Reserved_1
- [2:0] m0_mode_change_cmd
The command being performed.