3.3.168 interrupt_control

Configures interrupt behavior.

The interrupt_control register characteristics are:
Usage constraints
Can be read from when in ALL states. Can be written to when in ALL states.
Configurations
There is only one DMC configuration.
Attributes
Offset
0x500
Type
Read-write
Reset
0x00000000
Width
32
The following figure shows the bit assignments.
Figure 3-168 interrupt_control register bit assignments
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The following shows the bit assignments.
[31:10] Reserved_1
Unused bits
[9] phy_request_int_en
Program to enable or disable the PHY request interrupt.
[8] arch_fsm_int_en
Program to enable or disable the architectural fsm interrupt.
[7] temperature_event_int_en
Program to enable or disable the temperature event interrupt.
[6] link_err_int_en
Program to enable or disable the link error interrupt.
[5] failed_prog_int_en
Program to enable or disable the failed programmer's access interrupt.
[4] failed_access_int_en
Program to enable or disable the failed system access interrupt.
[3] dram_ecc_errd_int_en
Program to enable or disable the dram uncorrected error interrupt.
[2] dram_ecc_errc_int_en
Program to enable or disable the dram corrected error interrupt.
[1] ram_ecc_errd_int_en
Program to enable or disable the ram uncorrected error interrupt.
[0] ram_ecc_errc_int_en
Program to enable or disable the ram corrected error interrupt.
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