3.3.177 dram_ecc_errd_int_info_31_00

Shows information relating to the interrupt

The dram_ecc_errd_int_info_31_00 register characteristics are:
Usage constraints
Can be read from when in ALL states. Cannot be changed.
Configurations
There is only one DMC configuration.
Attributes
Offset
0x530
Type
Read-only
Reset
0x00000000
Width
32
The following figure shows the bit assignments.
Figure 3-177 dram_ecc_errd_int_info_31_00 register bit assignments
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The following shows the bit assignments.
[31:29] dram_ecc_errd_int_info_rank
Rank.
[28:11] dram_ecc_errd_int_info_row
Row.
[10:1] dram_ecc_errd_int_info_column
Column.
[0] dram_ecc_errd_int_info_30_00_valid
Indicates if an overflow (single interrupt overflow, or multiple interrupt overflow) has occurred and whether the interrupt information is valid. One indicates it is valid and that no overflow has occurred.
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