Shows information relating to the interrupt
The dram_ecc_errd_int_info_63_32 register characteristics are:
- Usage constraints
Can be read from when in ALL states. Cannot be changed.
There is only one DMC configuration.
The following figure shows the bit assignments.
Figure 3-178 dram_ecc_errd_int_info_63_32 register bit assignments
The following shows the bit assignments.
-  dram_ecc_errd_int_info_61_31_valid
Indicates if an overflow (single interrupt overflow, or multiple interrupt overflow) has occurred and whether the interrupt information is valid. One indicates it is valid and that no overflow has occurred.
- [30:4] Reserved_1
- [3:0] dram_ecc_errd_int_info_bank