Configures the type of refresh commands issued by the DMC.
The refresh_control_now register characteristics are:
- Usage constraints
Can be read from when in ALL states. Cannot be written to and only updated when in CONFIG or PAUSED states.
There is only one DMC configuration.
The following figure shows the bit assignments.
Figure 3-242 refresh_control_now register bit assignments
The following shows the bit assignments.
- [31:6] Reserved_2
- [5:4] refresh_granularity_now
Configures the refresh rate mode of the DMC. You must program this to match the mode of the DRAM. All DRAMs requiring refresh must use the same refresh rate.
- [3:0] Reserved_1