3.3.268 feature_control_now

Control register for DMC features.

The feature_control_now register characteristics are:
Usage constraints
Can be read from when in ALL states. Cannot be written to and only updated when in CONFIG, LOW-POWER or PAUSED states.
Configurations
There is only one DMC configuration.
Attributes
Offset
0x11F0
Type
Read-only
Reset
0x0AA00000
Width
32
The following figure shows the bit assignments.
Figure 3-268 feature_control_now register bit assignments
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The following shows the bit assignments.
[31:29] Reserved_3
Unused bits
[28] alert_mode_now
Configures the DMC behavior in response to dfi_alert_n being asserted.

Note

When performing DIMM CA training using the ALERT pin this mode must be set to interrupt-only mode.
[27:20] address_mirroring_mask_now
Each bit determines if address mirroring as per the DDR3/DDR4 RDIMM Design Specification must be applied to the corresponding rank. Set to 1 to enable mirroring, 0 to disable. Normally, this bit must be set high for odd physical ranks.
[19] dfi_err_mode_now
Configures the DMC behavior in response to dfi_err being asserted.
[18] lvl_wakeup_en_now
Program to enable the DMC to bring a rank out of self-refresh to perform PHY training. This must not be enabled when using geardown mode.
[17] mrs_output_inversion_now
Program to enable output inversion for MRS commands for DDR4 DIMMs.
[16] address_mirroring_now
Program to enable address mirroring for ranks identified by address_mirroring_mask.
[15] trr_enable_now
Program to enable issue of Target Row Refresh command on detection of potential maximum activate count (tMAC) violation. Must only be enabled for memories supporting this command.
[14] Reserved_2
Unused bits
[13] temp_poll_after_xsref_now
Program to insert an automatic temperature status poll command following exit from self-refresh.
[12:9] temp_poll_after_n_ref_now
Program to insert an automatic temperature status poll command following issue of n AUTOREFRESH commands. 0 disables the functionality. 1 is RESERVED
[8] zqcs_after_xsref_now
Program to insert an automatic ZQC short calibration command following exit from self-refresh.
[7:4] zqcs_after_n_ref_now
Program to insert an automatic ZQC short calibration command following n refreshes. 0 - disables the functionality. 1 is RESERVED
[3] two_t_timing_now
Program to enable or disable 2T command timing.
[2] Reserved_1
Unused bits
[1] crc_enable_now
Program to enable or disable Cyclic Redundancy Check (CRC) functionality on write data.

Note

When you enable CRC, the parameters t_wr, t_wtr and t_wtw must be extended by one cycle to accommodate the CRC functionality.
[0] write_dbi_enable_now
Program to enable or disable Data Bus Inversion (DBI) functionality for writes.
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