3.3.284 t_rtw_now

Configures the read-to-write timing parameter. This determines the READ to WRITE command delay applied between issued commands to the same chip, other bank group (t_rtw_s), same chip, same bank group (t_trw_l), and other chip-selects (t_rtw_cs).

The t_rtw_now register characteristics are:
Usage constraints
Can be read from when in ALL states. Cannot be written to and only updated when in CONFIG, LOW-POWER or PAUSED states.
Configurations
There is only one DMC configuration.
Attributes
Offset
0x1238
Type
Read-only
Reset
0x00060606
Width
32
The following figure shows the bit assignments.
Figure 3-284 t_rtw_now register bit assignments
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The following shows the bit assignments.
[31:21] Reserved_3
Unused bits
[20:16] t_rtw_cs_now
t_rtw_cs_now bitfield. The supported range for this bitfield is 4-31.
[15:13] Reserved_2
Unused bits
[12:8] t_rtw_l_now
t_rtw_l_now bitfield. The supported range for this bitfield is 4-31.
[7:5] Reserved_1
Unused bits
[4:0] t_rtw_s_now
t_rtw_s_now bitfield. The supported range for this bitfield is 4-31.
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