Configures the minimum cycle delay to apply for PHY low-power handshakes.
The t_lpresp_now register characteristics are:
- Usage constraints
Can be read from when in ALL states. Cannot be written to and only updated when in CONFIG, LOW-POWER or PAUSED states.
There is only one DMC configuration.
The following figure shows the bit assignments.
Figure 3-311 t_lpresp_now register bit assignments
The following shows the bit assignments.
- [31:3] Reserved_1
- [2:0] t_lpresp_now
The DMC waits a minimum t_lpresp cycles after asserting a PHY low power request before deasserting the request and resuming other commands. Zero means wait for dfi_lp_ack. The supported range for this bitfield is 0-7.