3.3.316 odt_rd_control_31_00_now

Configures the ODT on and off settings for active and inactive ranks during reads.

The odt_rd_control_31_00_now register characteristics are:
Usage constraints
Can be read from when in ALL states. Cannot be written to and only updated when in CONFIG, LOW-POWER or PAUSED states.
Configurations
There is only one DMC configuration.
Attributes
Offset
0x1368
Type
Read-only
Reset
0x00000000
Width
32
The following figure shows the bit assignments.
Figure 3-316 odt_rd_control_31_00_now register bit assignments
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The following shows the bit assignments.
[31:24] odt_mask_rd_cs3_now
Drives the dfi_odt[7:0] output signal during a read to DRAM rank 3. The supported range for this bitfield is 0-255.
[23:16] odt_mask_rd_cs2_now
Drives the dfi_odt[7:0] output signal during a read to DRAM rank 2. The supported range for this bitfield is 0-255.
[15:8] odt_mask_rd_cs1_now
Drives the dfi_odt[7:0] output signal during a read to DRAM rank 1. The supported range for this bitfield is 0-255.
[7:0] odt_mask_rd_cs0_now
Drives the dfi_odt[7:0] output signal during a read to DRAM rank 0. The supported range for this bitfield is 0-255.
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