ARM® CoreLink™ DMC-520 Dynamic Memory Controller Technical Reference Manual

Revision r2p2


Table of Contents

Preface
About this book
Product revision status
Intended audience
Using this book
Additional reading
Feedback
Feedback on this product
Feedback on content
1 Introduction
1.1 About the product
1.2 DMC-520 compliance
1.3 Features
1.4 Interfaces
1.5 Configurable options
1.6 Test features
1.7 Product documentation and design flow
1.8 Product revisions
2 Functional Description
2.1 About the functions
2.2 Clocking and resets
2.3 Interfaces
2.3.1 System interface
2.3.2 Programming interface
2.3.3 PHY interface
2.3.4 Profile and debug interface
2.3.5 Low-power clock control interface
2.3.6 Abort interface
2.4 Constraints and limitations of use
3 Programmers Model
3.1 About this programmers model
3.2 Register summary
3.3 Register descriptions
3.3.1 memc_status
3.3.2 memc_config
3.3.3 memc_cmd
3.3.4 address_control_next
3.3.5 decode_control_next
3.3.6 format_control
3.3.7 address_map_next
3.3.8 low_power_control_next
3.3.9 turnaround_control_next
3.3.10 hit_turnaround_control_next
3.3.11 qos_class_control_next
3.3.12 escalation_control_next
3.3.13 qv_control_31_00_next
3.3.14 qv_control_63_32_next
3.3.15 rt_control_31_00_next
3.3.16 rt_control_63_32_next
3.3.17 timeout_control_next
3.3.18 credit_control_next
3.3.19 write_priority_control_31_00_next
3.3.20 write_priority_control_63_32_next
3.3.21 queue_threshold_control_31_00_next
3.3.22 queue_threshold_control_63_32_next
3.3.23 memory_address_max_31_00_next
3.3.24 memory_address_max_43_32_next
3.3.25 access_address_min0_31_00_next
3.3.26 access_address_min0_43_32_next
3.3.27 access_address_max0_31_00_next
3.3.28 access_address_max0_43_32_next
3.3.29 access_address_min1_31_00_next
3.3.30 access_address_min1_43_32_next
3.3.31 access_address_max1_31_00_next
3.3.32 access_address_max1_43_32_next
3.3.33 access_address_min2_31_00_next
3.3.34 access_address_min2_43_32_next
3.3.35 access_address_max2_31_00_next
3.3.36 access_address_max2_43_32_next
3.3.37 access_address_min3_31_00_next
3.3.38 access_address_min3_43_32_next
3.3.39 access_address_max3_31_00_next
3.3.40 access_address_max3_43_32_next
3.3.41 access_address_min4_31_00_next
3.3.42 access_address_min4_43_32_next
3.3.43 access_address_max4_31_00_next
3.3.44 access_address_max4_43_32_next
3.3.45 access_address_min5_31_00_next
3.3.46 access_address_min5_43_32_next
3.3.47 access_address_max5_31_00_next
3.3.48 access_address_max5_43_32_next
3.3.49 access_address_min6_31_00_next
3.3.50 access_address_min6_43_32_next
3.3.51 access_address_max6_31_00_next
3.3.52 access_address_max6_43_32_next
3.3.53 access_address_min7_31_00_next
3.3.54 access_address_min7_43_32_next
3.3.55 access_address_max7_31_00_next
3.3.56 access_address_max7_43_32_next
3.3.57 channel_status
3.3.58 direct_addr
3.3.59 direct_cmd
3.3.60 dci_replay_type_next
3.3.61 dci_strb
3.3.62 dci_data
3.3.63 refresh_control_next
3.3.64 memory_type_next
3.3.65 feature_config
3.3.66 nibble_failed_031_000
3.3.67 nibble_failed_063_032
3.3.68 nibble_failed_095_064
3.3.69 nibble_failed_127_096
3.3.70 queue_allocate_control_031_000
3.3.71 queue_allocate_control_063_032
3.3.72 queue_allocate_control_095_064
3.3.73 queue_allocate_control_127_096
3.3.74 ecc_errc_count_31_00
3.3.75 ecc_errc_count_63_32
3.3.76 ecc_errd_count_31_00
3.3.77 ecc_errd_count_63_32
3.3.78 ram_err_count
3.3.79 link_err_count
3.3.80 scrub_control0_next
3.3.81 scrub_address_min0_next
3.3.82 scrub_address_max0_next
3.3.83 scrub_control1_next
3.3.84 scrub_address_min1_next
3.3.85 scrub_address_max1_next
3.3.86 scrub_control2_next
3.3.87 scrub_address_min2_next
3.3.88 scrub_address_max2_next
3.3.89 scrub_control3_next
3.3.90 scrub_address_min3_next
3.3.91 scrub_address_max3_next
3.3.92 scrub_control4_next
3.3.93 scrub_address_min4_next
3.3.94 scrub_address_max4_next
3.3.95 scrub_control5_next
3.3.96 scrub_address_min5_next
3.3.97 scrub_address_max5_next
3.3.98 scrub_control6_next
3.3.99 scrub_address_min6_next
3.3.100 scrub_address_max6_next
3.3.101 scrub_control7_next
3.3.102 scrub_address_min7_next
3.3.103 scrub_address_max7_next
3.3.104 feature_control_next
3.3.105 mux_control_next
3.3.106 rank_remap_control_next
3.3.107 scrub_control_next
3.3.108 t_refi_next
3.3.109 t_rfc_next
3.3.110 t_mrr_next
3.3.111 t_mrw_next
3.3.112 t_rdpden_next
3.3.113 t_rcd_next
3.3.114 t_ras_next
3.3.115 t_rp_next
3.3.116 t_rpall_next
3.3.117 t_rrd_next
3.3.118 t_act_window_next
3.3.119 t_rtr_next
3.3.120 t_rtw_next
3.3.121 t_rtp_next
3.3.122 t_wr_next
3.3.123 t_wtr_next
3.3.124 t_wtw_next
3.3.125 t_xmpd_next
3.3.126 t_ep_next
3.3.127 t_xp_next
3.3.128 t_esr_next
3.3.129 t_xsr_next
3.3.130 t_esrck_next
3.3.131 t_ckxsr_next
3.3.132 t_cmd_next
3.3.133 t_parity_next
3.3.134 t_zqcs_next
3.3.135 t_rddata_en_next
3.3.136 t_phyrdlat_next
3.3.137 t_phywrlat_next
3.3.138 rdlvl_control_next
3.3.139 rdlvl_mrs_next
3.3.140 t_rdlvl_en_next
3.3.141 t_rdlvl_rr_next
3.3.142 wrlvl_control_next
3.3.143 wrlvl_mrs_next
3.3.144 t_wrlvl_en_next
3.3.145 t_wrlvl_ww_next
3.3.146 phy_power_control_next
3.3.147 t_lpresp_next
3.3.148 phy_update_control_next
3.3.149 odt_timing_next
3.3.150 odt_wr_control_31_00_next
3.3.151 odt_wr_control_63_32_next
3.3.152 odt_rd_control_31_00_next
3.3.153 odt_rd_control_63_32_next
3.3.154 temperature_readout
3.3.155 training_status
3.3.156 update_status
3.3.157 dq_map_control_15_00_next
3.3.158 dq_map_control_31_16_next
3.3.159 dq_map_control_47_32_next
3.3.160 dq_map_control_63_48_next
3.3.161 dq_map_control_71_64_next
3.3.162 rank_status
3.3.163 mode_change_status
3.3.164 user_status
3.3.165 user_config0_next
3.3.166 user_config1_next
3.3.167 user_config2
3.3.168 user_config3
3.3.169 interrupt_control
3.3.170 interrupt_clr
3.3.171 interrupt_status
3.3.172 ram_ecc_errc_int_info_31_00
3.3.173 ram_ecc_errc_int_info_63_32
3.3.174 ram_ecc_errd_int_info_31_00
3.3.175 ram_ecc_errd_int_info_63_32
3.3.176 dram_ecc_errc_int_info_31_00
3.3.177 dram_ecc_errc_int_info_63_32
3.3.178 dram_ecc_errd_int_info_31_00
3.3.179 dram_ecc_errd_int_info_63_32
3.3.180 failed_access_int_info_31_00
3.3.181 failed_access_int_info_63_32
3.3.182 failed_prog_int_info_31_00
3.3.183 failed_prog_int_info_63_32
3.3.184 link_err_int_info_31_00
3.3.185 link_err_int_info_63_32
3.3.186 arch_fsm_int_info_31_00
3.3.187 arch_fsm_int_info_63_32
3.3.188 integ_cfg
3.3.189 integ_outputs
3.3.190 address_control_now
3.3.191 decode_control_now
3.3.192 address_map_now
3.3.193 low_power_control_now
3.3.194 turnaround_control_now
3.3.195 hit_turnaround_control_now
3.3.196 qos_class_control_now
3.3.197 escalation_control_now
3.3.198 qv_control_31_00_now
3.3.199 qv_control_63_32_now
3.3.200 rt_control_31_00_now
3.3.201 rt_control_63_32_now
3.3.202 timeout_control_now
3.3.203 credit_control_now
3.3.204 write_priority_control_31_00_now
3.3.205 write_priority_control_63_32_now
3.3.206 queue_threshold_control_31_00_now
3.3.207 queue_threshold_control_63_32_now
3.3.208 memory_address_max_31_00_now
3.3.209 memory_address_max_43_32_now
3.3.210 access_address_min0_31_00_now
3.3.211 access_address_min0_43_32_now
3.3.212 access_address_max0_31_00_now
3.3.213 access_address_max0_43_32_now
3.3.214 access_address_min1_31_00_now
3.3.215 access_address_min1_43_32_now
3.3.216 access_address_max1_31_00_now
3.3.217 access_address_max1_43_32_now
3.3.218 access_address_min2_31_00_now
3.3.219 access_address_min2_43_32_now
3.3.220 access_address_max2_31_00_now
3.3.221 access_address_max2_43_32_now
3.3.222 access_address_min3_31_00_now
3.3.223 access_address_min3_43_32_now
3.3.224 access_address_max3_31_00_now
3.3.225 access_address_max3_43_32_now
3.3.226 access_address_min4_31_00_now
3.3.227 access_address_min4_43_32_now
3.3.228 access_address_max4_31_00_now
3.3.229 access_address_max4_43_32_now
3.3.230 access_address_min5_31_00_now
3.3.231 access_address_min5_43_32_now
3.3.232 access_address_max5_31_00_now
3.3.233 access_address_max5_43_32_now
3.3.234 access_address_min6_31_00_now
3.3.235 access_address_min6_43_32_now
3.3.236 access_address_max6_31_00_now
3.3.237 access_address_max6_43_32_now
3.3.238 access_address_min7_31_00_now
3.3.239 access_address_min7_43_32_now
3.3.240 access_address_max7_31_00_now
3.3.241 access_address_max7_43_32_now
3.3.242 dci_replay_type_now
3.3.243 refresh_control_now
3.3.244 memory_type_now
3.3.245 scrub_control0_now
3.3.246 scrub_address_min0_now
3.3.247 scrub_address_max0_now
3.3.248 scrub_control1_now
3.3.249 scrub_address_min1_now
3.3.250 scrub_address_max1_now
3.3.251 scrub_control2_now
3.3.252 scrub_address_min2_now
3.3.253 scrub_address_max2_now
3.3.254 scrub_control3_now
3.3.255 scrub_address_min3_now
3.3.256 scrub_address_max3_now
3.3.257 scrub_control4_now
3.3.258 scrub_address_min4_now
3.3.259 scrub_address_max4_now
3.3.260 scrub_control5_now
3.3.261 scrub_address_min5_now
3.3.262 scrub_address_max5_now
3.3.263 scrub_control6_now
3.3.264 scrub_address_min6_now
3.3.265 scrub_address_max6_now
3.3.266 scrub_control7_now
3.3.267 scrub_address_min7_now
3.3.268 scrub_address_max7_now
3.3.269 feature_control_now
3.3.270 mux_control_now
3.3.271 rank_remap_control_now
3.3.272 scrub_control_now
3.3.273 t_refi_now
3.3.274 t_rfc_now
3.3.275 t_mrr_now
3.3.276 t_mrw_now
3.3.277 t_rdpden_now
3.3.278 t_rcd_now
3.3.279 t_ras_now
3.3.280 t_rp_now
3.3.281 t_rpall_now
3.3.282 t_rrd_now
3.3.283 t_act_window_now
3.3.284 t_rtr_now
3.3.285 t_rtw_now
3.3.286 t_rtp_now
3.3.287 t_wr_now
3.3.288 t_wtr_now
3.3.289 t_wtw_now
3.3.290 t_xmpd_now
3.3.291 t_ep_now
3.3.292 t_xp_now
3.3.293 t_esr_now
3.3.294 t_xsr_now
3.3.295 t_esrck_now
3.3.296 t_ckxsr_now
3.3.297 t_cmd_now
3.3.298 t_parity_now
3.3.299 t_zqcs_now
3.3.300 t_rddata_en_now
3.3.301 t_phyrdlat_now
3.3.302 t_phywrlat_now
3.3.303 rdlvl_control_now
3.3.304 rdlvl_mrs_now
3.3.305 t_rdlvl_en_now
3.3.306 t_rdlvl_rr_now
3.3.307 wrlvl_control_now
3.3.308 wrlvl_mrs_now
3.3.309 t_wrlvl_en_now
3.3.310 t_wrlvl_ww_now
3.3.311 phy_power_control_now
3.3.312 t_lpresp_now
3.3.313 phy_update_control_now
3.3.314 odt_timing_now
3.3.315 odt_wr_control_31_00_now
3.3.316 odt_wr_control_63_32_now
3.3.317 odt_rd_control_31_00_now
3.3.318 odt_rd_control_63_32_now
3.3.319 dq_map_control_15_00_now
3.3.320 dq_map_control_31_16_now
3.3.321 dq_map_control_47_32_now
3.3.322 dq_map_control_63_48_now
3.3.323 dq_map_control_71_64_now
3.3.324 user_config0_now
3.3.325 user_config1_now
3.3.326 periph_id_4
3.3.327 periph_id_0
3.3.328 periph_id_1
3.3.329 periph_id_2
3.3.330 periph_id_3
3.3.331 component_id_0
3.3.332 component_id_1
3.3.333 component_id_2
3.3.334 component_id_3
A Signal Descriptions
A.1 Signals list
B Revisions
B.1 Revisions

Release information

Document History
Issue Date Confidentiality Change
0000-00 07 March 2014 Non-Confidential First release for r0p0.
0001-00 30 September 2014 Non-Confidential First release for r0p1.
0100-00 12 February 2015 Non-Confidential First release for r1p0.
0200-00 23 June 2015 Non-Confidential First release for r2p0.
0200-01 30 October 2015 Non-Confidential Second release for r2p0.
0200-02 09 March 2016 Non-Confidential First release for r2p1
0202-00 15 July 2016 Non-Confidential First release for r2p2

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