3.3.3 Status Register

This register permits snooping to be enabled and disabled safely by indicating when changes made to the enable_snoops or enable_dvms bits in the Snoop Control Registers have not taken effect for all transactions outstanding in the system.

When changing these bits, the CCI-500 goes through a transition period where a mixture of transactions with the old value and transactions with the new value are in flight. During this time, the change_pending bit stays set to 1. You must wait for the change_pending bit to change to 0 before removing or adding masters into the coherency domain. See also 2.4.3 Snoop connectivity and control.


You must wait for the completion of write to the Snoop Control Register before testing the change_pending bit.
This register indicates whether:
  • There are any changes to the enables that have not yet been applied.
  • A slave interface has been disabled for future snoop and DVM messages, but has outstanding AC requests.
Other bits in the Status Register indicate:
  • Current power state.
  • Requested power state.
  • Power state change pending.
  • Snoop filter initialization phase.
Usage constraints
There are no usage constraints.
Available in all CCI-500 configurations.
See Table 1.
The following figure shows the bit assignments.
Figure 3-3 status register bit assignments
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The following table shows the bit assignments.

Table 3-4 status register bit assignments

Snoop filter RAM power state change pending. This bit reads back the PREQ input.
0No change pending, any previous requests have been accepted or denied.
1State change is pending and might be accepted or denied.
This indicates the last requested power state of the snoop filter RAMs. The possible values of this field are the same as those of sf_ram_state.
The snoop filter RAM power states are:
0b001Static snoop filter RAM retention.
0b011Dynamic snoop filter RAM retention.


This register is readable only when the interconnect is in either the dynamic retention or the On state.
Indicates when the snoop filter RAM is initialized. Shareable requests are not serviced during this period.
0Snoop filter RAM initialization is complete.
1Snoop filter RAM initialization is in progress.


If you use the interconnect to access the CCI-500 registers when the trackers are full of shareable requests waiting for initialization completion, it might not be possible to read this register until initialization is complete.
Indicates whether any changes to the 3.3.8 Snoop Control Registers or the 3.3.1 Control Override Register are pending in the CCI-500:
0No changes are pending.
1Changes are pending.
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