3.3.12 Maximum Outstanding Transactions Registers

These registers determine how many Outstanding Transactions (OTs) are permitted when the OT regulator is enabled for the relevant slave interface.

Usage constraints
If you set the maximum OT size greater than that configured in the RTL, then the value of SIx_RW_MAX is written into the register. The minimum value of SIx_RW_MAX is 4. Writing values lower than this writes a value of 4 into the register.
Accessible using only Secure accesses, unless you set the 3.3.2 Secure Access Register to permit Non-secure accesses.
Configurations
Available in all CCI-500 configurations.
A copy of this register exists for each slave interface.
Attributes
See Table 1.
The following figure shows the bit assignments.
Figure 3-11 qos_max_ot register bit assignments
To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.

The following table shows the bit assignments.

Table 3-14 qos_max_ot register bit assignments

Bits
Name
Reset
Function
[31:8]
Reserved
-
-
[7:0]
max_ot
SIx_RW_MAX
The maximum number of OTs for the interface. This is a combined issuing limit. It represents the maximum number of transactions that the upstream master can issue when the AR and AW channels are considered as one issuing source.

Note

Additional transactions can be issued into the CCI-500 at the boundary of the device. This is because of the presence of configurable registering between the boundary and the main trackers.
Non-ConfidentialPDF file icon PDF versionARM 100023_0001_00_en
Copyright © 2014, 2015 ARM. All rights reserved.