Non-Confidential | ![]() | ARM 100023_0001_00_en | ||
| ||||
Home > Signal Descriptions > ACE and ACE-Lite slave interface signals > Write address channel signals |
These signals carry control information that describes the nature of the data to be transferred. The data is transferred between master and slave using either a read data channel or a write data channel.
Table A-7 Write address channel signals
Signal
|
Direction
|
Description
|
---|---|---|
AWIDSx[n:0]
|
Input
|
Write address ID. You can configure the width of this signal.
|
AWADDRSx[n:0]
|
Input
|
Write address. You can configure the CCI-500 to support between a
32-bit and a 44-bit signal width.
|
AWREGIONSx[3:0]
|
Input
|
Write address region. You can tie this signal LOW if the master
does not drive it.
|
AWLENSx[7:0]
|
Input
|
Write burst length.
|
AWSIZESx[2:0]
|
Input
|
Write burst size.
|
AWBURSTSx[1:0]
|
Input
|
Write burst type.
|
AWLOCKSx
|
Input
|
Write lock type.
|
AWCACHESx[3:0]
|
Input
|
Write cache type.
|
AWPROTSx[2:0]
|
Input
|
Write protection type.
|
AWSNOOPSx[2:0]
|
Input
|
Write snoop request type.
|
AWDOMAINSx[1:0]
|
Input
|
Write domain.
|
AWQOSSx[3:0]
|
Input
|
Write QoS value.
|
AWUSERSx[n:0]
|
Input
|
Specified extension to AW payload. You can configure the width
of this signal.
|
NSAIDWSx[3:0]
|
Input | Optional extension to AW payload, that transmits the Non-secure access identifier for a request. |
AWVALIDSx
|
Input
|
Write address valid.
|
AWREADYSx
|
Output
|
Write address ready.
|