3.3.7 SBSX register descriptions

This section lists the SBSX registers.

SA Auxiliary Control register, SBSX

The sa_aux_ctl register is at offset 0x0500. Its characteristics are:

PurposeControls the operation of the SA bridges.
Usage constraintsThis register can be modified only with prior written permission from ARM.
ConfigurationsAvailable in all configurations.
AttributesSee Table 3-10 SBSX register summary.

The following figure shows the sa_aux_ctl register bit assignments.

Figure 3-145 sa_aux_ctl register bit assignments
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The following table shows the sa_aux_ctl register bit assignments.

Table 3-159 sa_aux_ctl register bit assignments

Bits Name Access Reset value Function
[63:12] - RAZ/WI 0x0 Reserved
[11] honor_ewa_en RW 0 If EWA=0, do not send write completion until the bridge receives completion
[10:8] - WI 0b100 Reserved
[7] - RW 1 Reserved
[6] - RW 1 Reserved
[5] pos_early_wr_comp_en RW 1 Enable early write completions for all writes that allow early acknowledgment
[4] - RW 1 Reserved
[3] - RW 0 Reserved
[2] - RW 1 Reserved
[1] qos_schedule_en RW 1 Set to 1 to enable QoS based scheduling of the AMBA requests
[0] rdreq_byp_en RW 1 Set to 1 to enable read bypass path

SBSX Identification register

The oly_sbsx_oly_id register is at offset 0xFF00. Its characteristics are:

PurposeContains the component identification information.
Usage constraintsThere are no usage constraints.
ConfigurationsAvailable in all configurations.
AttributesSee Table 3-10 SBSX register summary.

The following figure shows the oly_sbsx_oly_id register bit assignments.

Figure 3-146 oly_sbsx_oly_id register bit assignments
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The following table shows the oly_sbsx_oly_id register bit assignments.

Table 3-160 oly_sbsx_oly_id register bit assignments

Bits Name Access Reset value Function
[63:15] - RAZ/WI 0x0 Reserved
[14:8] node_id RO Value is specific to each SBSX bridge The node ID of the SBSX
[7:5] - RAZ/WI 0b000 Reserved
[4:0] oly_id RO 0xC Indicates that this node is an SBSX
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