2.12.2 SAM configuration

This section describes the SAM configuration.


  1. Associate each memory region with HN-Fs or HN-Is.
  2. Identify the node IDs of HNs and MN.
  3. Define the number of HN-Fs.
  4. Specify the base address of the CCN-502 configuration registers:
    SAMADDRMAP0[1:0]   //     0 - 512MB  Region Mapping
    SAMADDRMAP1[1:0]   // 512MB - 1GB    Region Mapping
    SAMADDRMAP2[1:0]   //   1GB - 1.5GB  Region Mapping
    SAMADDRMAP3[1:0]   // 1.5GB - 2GB    Region Mapping
    SAMADDRMAP4[1:0]   //   2GB - 2.5GB  Region Mapping
    SAMADDRMAP5[1:0]   // 2.5GB - 3GB    Region Mapping
    SAMADDRMAP6[1:0]   //   3GB - 3.5GB  Region Mapping
    SAMADDRMAP7[1:0]   // 3.5GB - 4GB    Region Mapping
    SAMADDRMAP8[1:0]   //   4GB - 8GB    Region Mapping
    SAMADDRMAP9[1:0]   //   8GB - 16GB   Region Mapping
    SAMADDRMAP10[1:0]  //  16GB - 32GB   Region Mapping
    SAMADDRMAP11[1:0]  //  32GB - 64GB   Region Mapping
    SAMADDRMAP12[1:0]  //  64GB - 128GB  Region Mapping
    SAMADDRMAP13[1:0]  // 128GB - 256GB  Region Mapping
    SAMADDRMAP14[1:0]  // 256GB - 512GB  Region Mapping
    SAMADDRMAP15[1:0]  // 512GB - 1TB    Region Mapping
    SAMADDRMAP16[1:0]  //   1TB - 2TB    Region Mapping
    SAMADDRMAP17[1:0]  //   2TB - 4TB    Region Mapping
    SAMADDRMAP18[1:0]  //   4TB - 8TB    Region Mapping
    SAMADDRMAP19[1:0]  //   8TB - 16TB   Region Mapping
    SAMMNNODEID[5:0]   // NodeID of MN
    SAMHNINODEID0[5:0] // NodeID of HN-I 0
    SAMHNINODEID1[5:0] // NodeID of HN-I 1
    SAMHNF0NODEID[5:0] // NodeID of HN-F 0
    SAMHNF1NODEID[5:0] // NodeID of HN-F 1
    SAMHNF2NODEID[5:0] // NodeID of HN-F 2
    SAMHNF3NODEID[5:0] // NodeID of HN-F 3
    SAMHNF4NODEID[5:0] // NodeID of HN-F 4
    SAMHNF5NODEID[5:0] // NodeID of HN-F 5
    SAMHNF6NODEID[5:0] // NodeID of HN-F 6
    SAMHNF7NODEID[5:0] // NodeID of HN-F 7
    SAMHNFMODE[2:0]    // Indication of number of HN-Fs
    PERIPHBASE[43:24]  // Address offset of configuration registers in MN

The decoded destination for each region must be static. The following table shows the valid values for the SAMADDRMAPx[1:0] inputs.

Table 2-4 Decoder mapping

SAMADDRMAPx[1:0] Decode
0b00 HN-F(s)
0b01 HN-I
0b10 Reserved

Although SAMADDRMAPx[1:0] only decodes to two destinations, there are three possible destinations for addressable requests:

The MN is responsible for all accesses to the CCN-502 Control and Status registers (CSRs), and for distribution and handling of barrier and Distributed Virtual Message operations (DVMops). Identification of barrier and DVMop transactions targeted to the MN occurs as a function of the transaction type, not as a function of the address.

Access to the CSRs is through a 16MB memory-mapped region. This region must be mapped to the HN‑I where address decoding is performed to identify CSR accesses. These accesses are subsequently managed by the MN. Therefore, although the MN manages accesses to the CSRs, these accesses must initially be mapped to and sent to HN-I.

The base address for the CSRs is defined using the static input PERIPHBASE[43:24]. PERIPHBASE must reside in a SAMADDRMAPx[1:0] that corresponds to HN-I. ARM recommends that PERIPHBASE resides in the bottom 4GB of address space so that 32-bit devices can access the CCN-502 configuration registers.

For the SAMHNFxNODEID inputs, the HN-Fs are numbered in ascending order from the smallest HN‑F NodeID to the largest HN-F NodeID.

Non-ConfidentialPDF file icon PDF versionARM 100052_0001_00_en
Copyright © 2014, 2015, 2017 ARM Limited or its affiliates. All rights reserved.