3.1.3 Requirements of configuration register reads and writes

Reads and writes to the CCN-502 configuration registers must meet certain requirements.

If the following requirements are not met then this can result in unpredictable behavior.

  • All accesses must be of device type, either:
    • Device, Strongly Ordered.
    • nGnRE, nGnRnE.
  • All accesses must have a data size of 32 bits or 64 bits.
  • All accesses must be natively aligned, that is:
    • 32-bit accesses must be aligned to a 32-bit boundary.
    • 64-bit accesses must be aligned to a 64-bit boundary.
  • For configuration register writes, all bits, 32 or 64, must be written, that is, all byte lanes must be valid:
    • WRSTB must indicate that all bytes lanes are valid if the write transaction is from an AMBA interface.
    • BE must indicate that all byte lanes are valid if the write transaction is sent from a CHI interface.
  • Secure registers can only be accessed by a Secure access, that is, NS = 0b0. Non-secure registers can be accessed by either a Secure or Non-secure access.
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