4.10.1 Software-configurable error injection

The HN-F supports software-configurable error injection and reporting. This feature enables testing of the software error handler routine for L3 double-bit ECC data errors.

The HN-F configuration register for a particular logical thread enables configurable error injection and reporting. When enabled, any Cacheable read for which the HN-F provides the data, that is, an L3 hit, drives the slave error from the L3 pipe and drives an error interrupt through the MN for that read. This emulates a double-bit ECC error in the L3 data RAM without polluting the L3 data RAM through the fill path.

Note:

L3 misses do not drive any slave errors or error interrupts. This mechanism is designed to mimic L3 data ECC errors for L3 hits.

To configure error injection, use the following bits in the hnf_err_inj register:

Bit[0], hnf_err_inj_enEnables the HN-F error report and injection. When enabled, any Cacheable read compares its SrcID and LPID with the hnf_err_inj_srcid and hnf_err_inj_lpid bits to report a slave error if the HN-F provides data for an L3 hit.
Bits[7:1], hnf_err_inj_srcidSrcID of the requester to inject error.
Bits[10:8], hnf_err_inj_lpidLPID of the requester to inject error.
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