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This section shows examples of how you can configure a CCN-502 system.
Figure 2-1 CCN-502 block diagram shows interconnects that include only the components that are deliverables in the CCN-502 product. The following two figures show interconnects that include additional optional components that are not deliverables in the CCN-502 product.
Figure 2-2 Interconnect with optional SBSX protocol bridges shows a CCN-502 interconnect that includes an optional SBSX protocol bridge.
Figure 2-3 Interconnect with memory controller and processor shows an example of a CCN-502 system, including optional devices such as a processor and Memory Controller (MC), to create a complete coherent subsystem. The interconnect in this baseline system does not include the optional protocol bridges, and therefore requires processor clusters and Dynamic Memory Controllers (DMCs) that include native CHI interfaces, such as the Cortex®-A57 MPCore multiprocessor and the CoreLink™ DMC-520 memory controller, respectively.