1.5.1 Configurable parameters

This section lists the parameters that are configurable at build time.

Table 1-1 Configurable parameters

Component Feature Options Comments
External interfaces Number of ACE-Lite/ACE-Lite+DVM slave ports for connection to the master I/O subsystems 3, 6, or 9. Up to two RN-I bridges, that is, any two, can be depopulated. The number of AMBA interfaces per RN-I bridge is fixed at three.
RN-I bridge interface type ACE-Lite or ACE-Lite+DVM. All interfaces for any particular RN-I bridge must be identical.
Build-time component population or depopulation Number of RN-I bridges 1, 2, or 3. Up to two RN-I bridges, that is, any two, can be depopulated.
CHI to AXI protocol bridges (SBSX) Present or not present. Populated as a group, that is, all or none. SBSX population determines the SN-F interface type, either CHI or AXI4.
XP End-to-end ring parity protection Present or not present. Parity protection from ingress to egress of the ring.
HN-F/L3 L3 cache capacity 0KB, 128KB, 512KB, 1MB, or 2MB per partition. All L3s must be configured identically.
Snoop filter capacity 512KB, 2MB, or 4MB per partition. All snoop filters must be configured identically.
L3 tag/data/SF RAM latency 2 or 3 cycles. All tag, data, and snoop filter RAMs in all HN-Fs have identical latency.
SBSX Data width on SBSX AMBA interface 128-bit or 256-bit data. Data width is determined by SBSX_128_n256 input pin.
MC/SN-F Number of memory controllers 2 or 4. Up to two SN-F interfaces can be depopulated. This parameter applies only to 8XP/4HNF configuration.
REQ Channel RSVDC field width 4 or 8 bits. On the REQ channel, the RSVDC field width can be set to 4 or 8 bits.
Clocking and timing XP to device clocking Synchronous 1:1, Asynchronous. Device to XP asynchronous Bridge (DSSB) is not supported in combination with protocol bridge devices or with HN-F/L3 components.
DSSB population Present or not present at group granularity, RN-F or SN. DSSB or Device Register Slice (DRS) usage is mutually exclusive.
DSSB FIFO depth 8, 10, or 12. Allows for 1, 2, or 3 cycles of latency between the CCN-502 and the CCN502_RNF_DSSB and CCN502_SNF_DSSB blocks.
AMBA interface clocking N:1 synchronous, where N is 1-4. AMBA interface runs at the same or a lower frequency than the CCN-502.
STMHWEVENT interface clocking N:1 synchronous, where N is 2-4. The STMHWEVENT interface runs at a lower frequency than the CCN-502.
Number of XP to DRS 0, 1, or 2. DRS or DSSB usage is mutually exclusive. DRS can otherwise be present at any device interface.
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