2.8.3 HN-I programming sequence
Complete these programming steps before any non-configuration access to the HN-I.
Program the PCIeRC RN-I Node ID List register to identify the RN-Is attached to PCIe
masters. The PCIeRC RN-I Node ID List register is a 64-bit register where each
bit signifies the NodeID of an RN. For example, if the NodeID of an RN-I
attached to PCIe master is
0x2 then bit of
the register must be set.
Set the ser_devne_wr bit in the HN-I Auxiliary Control register. When this bit
is set, the HN-I serializes the Device-nGnRnE writes and does not send any
other write request with the same AWID as an outstanding Device-nGnRnE
Program the HN-I to not give early write completions. To do this, first clear the
hni_pos_en bit in the HN-I PoS Control register, then clear the
pos_early_wr_comp_en bit in the HN-I Auxiliary Control register.