2.8.3 HN-I programming sequence

Complete these programming steps before any non-configuration access to the HN-I.

Procedure

  1. Program the PCIeRC RN-I Node ID List register to identify the RN-Is attached to PCIe masters. The PCIeRC RN-I Node ID List register is a 64-bit register where each bit signifies the NodeID of an RN. For example, if the NodeID of an RN-I attached to PCIe master is 0x2 then bit[2] of the register must be set.
  2. Set the ser_devne_wr bit in the HN-I Auxiliary Control register. When this bit is set, the HN-I serializes the Device-nGnRnE writes and does not send any other write request with the same AWID as an outstanding Device-nGnRnE write.
  3. Program the HN-I to not give early write completions. To do this, first clear the hni_pos_en bit in the HN-I PoS Control register, then clear the pos_early_wr_comp_en bit in the HN-I Auxiliary Control register.
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