17.111 STSETH, STSETLH

Atomic bit set on halfword in memory, without return.

Syntax

STSETH Ws, [Xn|SP] ; No memory ordering general registers

STSETLH Ws, [Xn|SP] ; Release general registers

Where:

Ws
Is the 32-bit name of the general-purpose register holding the data value to be operated on with the contents of the memory location.
Xn|SP
Is the 64-bit name of the general-purpose base register or stack pointer.

Architectures supported

Supported in ARMv8.1 and later.

Usage

Atomic bit set on halfword in memory, without return, atomically loads a 16-bit halfword from memory, performs a bitwise OR with the value held in a register on it, and stores the result back to memory.

  • STSETH has no memory ordering semantics.
  • STSETLH stores to memory with release semantics, as described in Load-Acquire, Store-Release.

For information about memory accesses see Load/Store addressing modes in the ARM Architecture Reference Manual ARMv8, for ARMv8-A architecture profile.

Non-ConfidentialPDF file icon PDF versionARM 100069_0608_00_en
Copyright © 2014–2017 ARM Limited or its affiliates. All rights reserved.