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Home > Advanced SIMD Instructions (32-bit) > VQDMLAL and VQDMLSL (by vector or by scalar) |

Vector Saturating Doubling Multiply Accumulate Long, Vector Saturating Doubling Multiply Subtract Long.

`VQD`

{`op`

L

}.`cond`

`datatype`

, `Qd`

,
`Dn`

`Dm`

`VQD`

{`op`

L

}.`cond`

`datatype`

, `Qd`

,
`Dn`

[`Dm`

]`x`

where:

`op`

must be one of:

`MLA`

Multiply Accumulate.

`MLS`

Multiply Subtract.

`cond`

is an optional condition code.

`datatype`

must be either

`S16`

or`S32`

.`Qd`

,`Dn`

are the destination vector and the first operand vector.

`Dm`

is the vector holding the second operand, for a by vector operation.

`Dm`

[`x`

]is the scalar holding the second operand, for a by scalar operation.

These instructions multiply their operands and double the results. `VQDMLAL`

adds the results to the values in the destination register. `VQDMLSL`

subtracts the results from the values in the destination register.

If any of the results overflow, they are saturated. The sticky QC flag (FPSCR bit[27]) is set if saturation occurs.