17.91 STLLR

Store LORelease Register.

Syntax

STLLR Wt, [Xn|SP{,#0}] ; 32-bit

STLLR Xt, [Xn|SP{,#0}] ; 64-bit

Where:

Wt
Is the 32-bit name of the general-purpose register to be transferred.
Xt
Is the 64-bit name of the general-purpose register to be transferred.
Xn|SP
Is the 64-bit name of the general-purpose base register or stack pointer.

Architectures supported

Supported in ARMv8.1 and later.

Usage

Store LORelease Register stores a 32-bit word or a 64-bit doubleword to a memory location, from a register. The instruction also has memory ordering semantics as described in Load LOAcquire, Store LORelease. For information about memory accesses, see Load/Store addressing modes in the ARM Architecture Reference Manual ARMv8, for ARMv8-A architecture profile.

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