14.41 VCVTB, VCVTT (between half-precision and double-precision)

These instructions convert between half-precision and double-precision floating-point numbers.

The conversion can be done in either of the following ways:

  • From half-precision floating-point to double-precision floating-point (F64.F16).
  • From double-precision floating-point to half-precision floating-point (F16.F64).

VCVTB uses the bottom half (bits[15:0]) of the single word register to obtain or store the half-precision value.

VCVTT uses the top half (bits[31:16]) of the single word register to obtain or store the half-precision value.

Note:

These instructions are supported only in ARMv8.

Syntax

VCVTB{cond}.F64.F16 Dd, Sm

VCVTB{cond}.F16.F64 Sd, Dm

VCVTT{cond}.F64.F16 Dd, Sm

VCVTT{cond}.F16.F64 Sd, Dm

where:

cond
is an optional condition code.
Dd
is a double-precision register for the result.
Sm
is a single word register holding the operand.
Sd
is a single word register for the result.
Dm
is a double-precision register holding the operand.

Usage

These instructions convert the half-precision value in Sm to double-precision and place the result in Dd, or the double-precision value in Dm to half-precision and place the result in Sd.

Floating-point exceptions

These instructions can produce Input Denormal, Invalid Operation, Overflow, Underflow, or Inexact exceptions.

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