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Home > Advanced SIMD Instructions (32-bit) > VLDR pseudo-instruction |
The VLDR
pseudo-instruction loads a constant value into every element of a 64-bit Advanced SIMD vector.
VLDR
pseudo-instruction only.
VLDR
{
}.cond
datatype
,=Dd
constant
where:
cond
datatype
must be one of I
,
n
S
, n
U
, or
n
F32
.
n
Dd
constant
datatype
.If an instruction (for example, VMOV
)
is available that can generate the constant directly into the register,
the assembler uses it. Otherwise, it generates a doubleword literal
pool entry containing the constant and loads the constant using
a VLDR
instruction.