Non-Confidential | ![]() | ARM 100069_0608_00_en | ||
| ||||
Home > Advanced SIMD Instructions (32-bit) > VMOV (between an ARM register and an Advanced SIMD scalar) |
Transfer contents between an ARM register and an Advanced SIMD scalar.
VMOV
{
}{.cond
}
size
[Dn
],
x
Rd
VMOV
{
}{.cond
}
datatype
,
Rd
[Dn
]
x
where:
cond
is an optional condition code.
size
the data size. Can be 8
, 16
, or 32
. If omitted,
is size
32
.
datatype
the data type. Can be U8
, S8
, U16
, S16
, or 32
. If omitted,
is
datatype
32
.
Dn
[x
]is the Advanced SIMD scalar.
Rd
is the ARM register.
must
not be PC.Rd
VMOV
transfers
the contents of the least significant byte, halfword, or word of Dn
[x], Rd
Rd
into Dn
[x].
VMOV
transfers
the contents of Rd
, Dn
[x]Dn
[x] into the
least significant byte, halfword, or word of Rd
.
The remaining bits of Rd
are
either zero or sign extended.