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Home > A64 SIMD Vector Instructions > SMIN (vector) |
Signed Minimum (vector).
SMIN
Vd
.T
, Vn
.T
, Vm
.T
Where:
Vd
T
8B
, 16B
, 4H
, 8H
, 2S
or 4S
.
Vn
Vm
Signed Minimum (vector). This instruction compares corresponding elements in the vectors in the two source SIMD and FP registers, places the smaller of each of the two signed integer values into a vector, and writes the vector to the destination SIMD and FP register.
Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.