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Home > A64 General Instructions > BICS (shifted register) |
Bitwise Bit Clear (shifted register), setting flags.
BICS
Wd
, Wn
, Wm
{, shift
#amount
} ; 32-bit
BICS
Xd
, Xn
, Xm
{, shift
#amount
} ; 64-bit
Where:
Wd
Wn
Wm
amount
Depends on the instruction variant:
Xd
Xn
Xm
shift
LSL
, LSR
, ASR
, or ROR
.
Bitwise Bit Clear (shifted register), setting flags, performs a bitwise AND of a register value and the complement of an optionally-shifted register value, and writes the result to the destination register. It updates the condition flags based on the result.
, where R
d = R
n AND NOT shift
(R
m, amount
)
is either R
W
or X
.