20.239 UDOT (vector)

Dot Product unsigned arithmetic (vector).


UDOT Vd.Ta, Vn.Tb, Vm.Tb


Is the name of the SIMD and FP destination register.
Is an arrangement specifier, and can be either 2S or 4S.
Is the name of the first SIMD and FP source register.
Is an arrangement specifier, and can be either 8B or 16B.
Is the name of the second SIMD and FP source register.

Architectures supported (vector)

Supported in ARMv8.2 and later.

For ARMv8.2 and ARMv8.3, this is an optional instruction.


Dot Product unsigned arithmetic (vector). This instruction performs the dot product of the four 8-bit elements in each 32-bit element of the first source register with the four 8-bit elements of the corresponding 32-bit element in the second source register, accumulating the result into the corresponding 32-bit element of the destination register.

Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.


ID_AA64ISAR0_EL1.DP indicates whether this instruction is supported. See ID_AA64ISAR0_EL1 in the ARM Architecture Reference Manual ARMv8, for ARMv8-A architecture profile.
Non-ConfidentialPDF file icon PDF versionARM 100069_0608_00_en
Copyright © 2014–2017 ARM Limited or its affiliates. All rights reserved.