The ARMv8 exception model defines Exception levels EL0-EL3,
- EL0 has the lowest software
execution privilege, and execution at EL0 is called unprivileged
- Increased values of n, from 1 to 3, indicate increased
software execution privilege.
- EL2 provides support for processor virtualization.
- EL3 provides support for two security states.
The Cortex-A72 processor implements all the Exception
levels, EL0-EL3, and supports both Execution states, AArch64 and
AArch32, at each Exception level.
Execution can move between Exception levels only on taking
an exception, or on returning from an exception:
- On taking an exception, the Exception level either
increases or remains the same. The Exception level cannot decrease
on taking an exception.
- On returning from an exception, the Exception level
either decreases or remains the same. The Exception level cannot
increase on returning from an exception.
The Exception level that execution changes to, or remains
in, on taking an exception, is called the target Exception
level of the exception and:
exception type has a target Exception level that is either:
- Implicit in the nature of
- Defined by configuration bits in the System registers.
- An exception cannot target the EL0 Exception level.
Exception levels, and privilege levels, are defined within
a particular Security state, and 3.2.6 ARMv8 security model
describes the permitted combinations
of Security state and Exception level.