1.2.1 ARM architecture

The Cortex-A72 processor implements the ARMv8-A architecture. This includes:

  • Support for both AArch32 and AArch64 Execution states.
  • Support for all Exception levels, EL0, EL1, EL2, and EL3, in each Execution state.
  • The A32 instruction set, previously called the ARM instruction set.
  • The T32 instruction set, previously called the Thumb instruction set.
  • The A64 instruction set.
The Cortex-A72 processor supports the following features:
  • Advanced Single Instruction Multiple Data (SIMD) operations.
  • Floating-point operations.
  • Optional Cryptography Extension.
The Cortex-A72 processor does not support the T32EE (ThumbEE) instruction set.
See the ARM® Architecture Reference Manual ARMv8, for ARMv8-A architecture profile for more information.
Non-ConfidentialPDF file icon PDF versionARM 100095_0002_03_en
Copyright © 2014, 2015 ARM. All rights reserved.