4.2.12 AArch64 virtualization registers

The following table shows the virtualization registers in AArch64 state. Bits[63:32] are reset to 0x00000000 for all 64-bit registers in the following table.

Table 4-13 AArch64 virtualization registers

Name Type Reset Width Description
VPIDR_EL2 RW -a 32 4.3.28 Virtualization Processor ID Register, EL2
VMPIDR_EL2 RW -b 64 4.3.29 Virtualization Multiprocessor ID Register, EL2
SCTLR_EL2 RW 0x30C50838 32 Secure Control Register, EL3 
ACTLR_EL2 RW 0x00000000 32 4.3.33 Auxiliary Control Register, EL2
HCR_EL2 RW 0x00000000 64 4.3.34 Hypervisor Configuration Register, EL2
MDCR_EL2 RW 0x00000006d 32
Monitor Debug Configuration Register, EL2 c
CPTR_EL2 RW 0x000033FF 32 4.3.35 Architectural Feature Trap Register, EL2
HSTR_EL2 RW 0x00000000 32 4.3.36 Hypervisor System Trap Register
HACR_EL2 RW 0x00000000 32 4.3.37 Hyp Auxiliary Configuration Register
TTBR0_EL2 RW UNK 64 Translation Table Base Address Register 0, EL3 c
TCR_EL2 RW UNK 32 4.3.42 Translation Control Register, EL2
VTTBR_EL2 RW UNK 64 Virtualization Translation Table Base Address Register, EL2 c
VTCR_EL2 RW UNK 32 4.3.43 Virtualization Translation Control Register, EL2
DACR32_EL2 RW 0x00000000 32 Domain Access Control Register, EL2 c
AFSR0_EL2 RW RES0 32 4.3.52 Auxiliary Fault Status Register 0, EL2 and Hyp Auxiliary Data Fault Status Register
AFSR1_EL2 RW RES0 32 4.3.53 Auxiliary Fault Status Register 1, EL2 and Hyp Auxiliary Instruction Fault Status Register
ESR_EL2 RW 0x00000000 32 Exception Syndrome Register, EL2 c
FAR_EL2 RW UNK 64 Fault Address Register, EL2 c
HPFAR_EL2 RW 0x00000000 64 Hyp IPA Fault Address Register, EL2 c
MAIR_EL2 RW UNK 64 Memory Attribute Indirection Register, EL2 c
AMAIR_EL2 RW RES0 64 4.3.57 Auxiliary Memory Attribute Indirection Register, EL2
VBAR_EL2 RW UNK 64 Vector Base Address Register, EL2 c
a The reset value is the value of the Main ID Register.
b The reset value is the value of the Multiprocessor Affinity Register.
c See the ARM® Architecture Reference Manual ARMv8 for more information.
d The reset value for bit[7] is UNK.
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