The REVIDR_EL1 characteristics are:
- Provides implementation-specific minor revision
information that can only be interpreted in conjunction with the
- Usage constraints
The accessibility to the REVIDR_EL1 by Exception
||EL3(SCR.NS = 1)
||EL3(SCR.NS = 0)
The REVIDR_EL1 is:
- Common to Secure and Non-secure states.
- Architecturally mapped to the AArch32 REVIDR register.
The REVIDR_EL1 is a 32-bit register.
- See the register summary in Table 4-1 AArch64 identification registers.
The following figure shows the
REVIDR_EL1 bit assignments.
Figure 4-3 REVIDR_EL1 bit assignments
The following table shows the REVIDR_EL1
Table 4-18 REVIDR_EL1 bit assignments
||Implementation-specific revision information. The reset value is determined by
the specific Cortex-A72
To access the REVIDR_EL1 in AArch64 state, read the register
MRS <Xt>, REVIDR_EL1; Read Revision ID Register
To access the REVIDR in AArch32 state, read the CP15 register
MRC p15, 0, <Rt>, c0, c0, 6; Read Revision ID Register