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Table 4-95 c12 register summary
op1 | CRm | op2 | Name | Type | Reset | Description |
---|---|---|---|---|---|---|
0 | c0 | 0 | VBAR | RW | a |
Vector Base Address Register. |
1 | MVBAR | RW | UNK | Monitor Vector Base Address Register. b | ||
2 | RMR | RW | c |
Reset Management Register. See 4.3.61 Reset Management Register, EL3. | ||
c1 | 0 | ISR | RO | UNK | Interrupt Status Register. b | |
4 | c0 | 0 | HVBAR | RW | UNK | Hyp Vector Base Address Register. b |
0x00000000
for the Secure
copy of the register. You must program the Non-secure copy of the register with
the required initial value, as part of the processor boot sequence.