The TLBTR characteristics are:
- Provides information about the TLB implementation.
- Usage constraints
The accessibility to the TLBTR by Exception level
||EL3(SCR.NS = 1)
||EL3(SCR.NS = 0)
The TLBTR is Common to Secure and Non-secure
- See the register summary in Table 4-84 c0 register summary.
The following figure shows the TLBTR bit assignments.
Figure 4-79 TLBTR bit assignments
The following table shows the TLBTR bit assignments.
Table 4-115 TLBTR bit assignments
Not Unified. Indicates whether
the implementation has a unified TLB. The value is:
|0||Processor has a unified TLB.
To access the TLBTR in AArch32 state, read the CP15 register with:
MRC p15, 0, <Rt>, c0, c0, 3; Read TLB Type Register