The instruction cache is fed by three fill buffers that hold
instructions returned from the L2 cache on a linefill operation,
or instructions from Non-cacheable regions. The fill buffers are non-blocking.
An instruction cache hit can bypass an in-progress cache miss, even
before the critical word is returned. A line at a given Physical
Address remains in a fill buffer until the fill buffer must be reclaimed.
At this time, the fill buffer contents are either transferred to
the main instruction cache or discarded if no fetch has occurred
to the address of the line over the lifetime of the line in the