6.5 Program flow prediction

The Cortex-A72 processor contains program flow prediction hardware, also known as branch prediction.

With program flow prediction disabled, all taken branches incur a penalty associated with flushing the pipeline. To avoid this penalty, the branch prediction hardware operates at the front of the instruction pipeline. The branch prediction hardware consists of:
  • A Branch Target Buffer (BTB) to identify branches and provide targets for direct branches.
  • 2-level global history-based direction predictor.
  • Indirect predictor to provide targets for indirect branches.
  • Return stack.
  • Static predictor.
The combination of global history-based direction predictor and BTB are called dynamic predictor.
This section contains the following subsections:
Non-ConfidentialPDF file icon PDF versionARM 100095_0002_03_en
Copyright © 2014, 2015 ARM. All rights reserved.