11.7.2 Performance Monitors Program Counter Sample Register

The PMPCSR characteristics are:
Purpose
The PMPCSR registers are aliases of the EDPCSR debug registers. Reads of the PMPCSR registers return a copy of the EDPCSR debug registers but does not:
  • Cause a new EDPCSR capture.
  • Change the EDCIDSR and EDVIDSR registers.
Usage constraints
The external accessibility to the PMPCSR by condition code is:
Off DLK OSLK EPMAD SLK Default
Error Error RO RO RO RO
Table 11-1 External register access conditions describes the condition codes.
Configurations
PMPCSR[31:0] copies the EDPCSRlo debug register.
PMPCSR[63:32] copies the EDPCSRhi debug register.
Attributes
See the register summary in Table 11-7 Memory-mapped PMU register summary.
See the ARM® Architecture Reference Manual ARMv8 for more information about the EDPCSR debug registers.
PMPCSR[31:0] can be accessed through the internal memory-mapped interface and the external debug interface, offset 0x600.
PMPCSR[63:32] can be accessed through the internal memory-mapped interface and the external debug interface, offset 0x604.
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