ARM Cortex-A72 MPCore Processor Technical Reference Manual : 14.2 Programmers model for Advanced SIMD and Floating-point

14.2 Programmers model for Advanced SIMD and Floating-point

Software can identify the Cortex-A72 processor Advanced SIMD and Floating-point features by using the feature identification registers in the AArch64 and AArch32 states.

You can access the feature identification registers in AArch64 state using the MRS instructions, for example:

MRS <Xt>, MVFR0_EL1 ; Read MVFR0_EL1 into Xt
MRS <Xt>, MVFR1_EL1 ; Read MVFR1_EL1 into Xt
MRS <Xt>, MVFR2_EL1 ; Read MVFR2_EL1 into Xt

You can access the feature identification registers in AArch32 state using the VMRS instruction, for example:

VMRS <Rt>, FPSID ; Read FPSID into Rt
VMRS <Rt>, MVFR0 ; Read MVFR0 into Rt
VMRS <Rt>, MVFR1 ; Read MFFR1 into Rt
VMRS <Rt>, MVFR2 ; Read MVFR2 into Rt

The following table lists the feature identification registers for the Advanced SIMD and Floating-point.

Table 14-1 Advanced SIMD and Floating-point feature identification registers

AArch64 name	AArch32 name	Description
-	FPSID	See 14.6.1 Floating-point System ID Register
MVFR0_EL1	MVFR0	See 14.4.3 Media and VFP Feature Register 0, EL1
MVFR1_EL1	MVFR1	See 14.4.4 Media and VFP Feature Register 1, EL1
MVFR2_EL1	MVFR2	See 14.4.5 Media and VFP Feature Register 2, EL1

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