You can access the feature identification registers in AArch64 state
using the MRS
instructions, for example:
MRS <Xt>, MVFR0_EL1 ; Read MVFR0_EL1 into Xt
MRS <Xt>, MVFR1_EL1 ; Read MVFR1_EL1 into Xt
MRS <Xt>, MVFR2_EL1 ; Read MVFR2_EL1 into Xt
You can access the feature identification registers in AArch32 state
using the VMRS
instruction, for example:
VMRS <Rt>, FPSID ; Read FPSID into Rt
VMRS <Rt>, MVFR0 ; Read MVFR0 into Rt
VMRS <Rt>, MVFR1 ; Read MFFR1 into Rt
VMRS <Rt>, MVFR2 ; Read MVFR2 into Rt
The following table lists the feature
identification registers for the Advanced SIMD and Floating-point.
Table 14-1 Advanced SIMD and Floating-point feature identification
registers