A.10.2 Write address channel signals

The following table shows the write address channel signals for the ACE master interface.

Table A-18 Write address channel signals

Signal Type Description
AWREADYM Input Write address ready.
AWVALIDM Output Write address valid.
AWIDM[6:0] Output Write request ID.
AWADDRM[43:0] Output Write address.
AWLENM[7:0] Output Write burst length. AWLENM[7:2] is always 0b000000.
AWSIZEM[2:0] Output Write burst size.
AWBURSTM[1:0] Output Write burst type.
AWBARM[1:0] Output Write barrier type.
AWDOMAINM[1:0] Output Write shareability domain type.
AWLOCKM Output Write lock type.
AWCACHEM[3:0] Output Write cache type.a
AWPROTM[2:0] Output Write protection type.
AWSNOOPM[2:0] Output Write snoop request type.
AWUNIQUEM Output
Indicates the write operation for a WriteBack, WriteClean, or WriteEvict transaction is:
0Shared.
1Unique.
WRMEMATTR[7:0] Output
Write request raw memory attributes:
[7]Outer Shareable.
[6:3]Outer memory attribute in MAIR format.
[2]Inner Shareable.
[1:0]
0b00Device.
0b01Normal Non-cacheable.
0b10Normal Write-Through.
0b11Normal Write-Back.
a Allocation hints based on outer memory attributes from the MMU.
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